• DocumentCode
    2696066
  • Title

    Systems performance measurement on PCI Pamette

  • Author

    Moll, Laurent ; Shand, Mark

  • Author_Institution
    Pole Univ. Leonard da Vinci La Defense, France
  • fYear
    1997
  • fDate
    16-18 Apr 1997
  • Firstpage
    125
  • Lastpage
    133
  • Abstract
    We describe the use of a reconfigurable board to obtain information on the performance that can be expected on particular systems. Our goal is to use the reconfigurability, of the board´s interface to test a system and discover not only the maximum bandwidth and best latency attainable, but also the way to reliably achieve these figures. The board we present uses the now widespread PCI bus. PCI is sufficiently complex, and its implementations sufficiently varied, that it is impossible to guess the performance that can be obtained by a specific board on a specific computer with the only technical characteristics of the two in hand. We observe astonishing performance differences between almost identical systems and comparable figures between small PCs and big servers. Our performance tests can be an end in themselves, however, they also serve to demonstrate the value of a reconfigurable bus interface. With the same board, we can test and choose a system, make informed architectural decisions on the hardware/software interface, and then finely tune the bus interface to get maximum and predictable figures in the running application
  • Keywords
    coprocessors; field programmable gate arrays; reconfigurable architectures; system buses; PCI Pamette; PCI bus; hardware/software interface; performance; performance tests; reconfigurable board; reconfigurable bus interface; systems performance measurement; Bandwidth; Computer interfaces; Coprocessors; Delay; Graphics; Personal communication networks; Reconfigurable logic; System performance; System testing; Workstations;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Custom Computing Machines, 1997. Proceedings., The 5th Annual IEEE Symposium on
  • Conference_Location
    Napa Valley, CA
  • Print_ISBN
    0-8186-8159-4
  • Type

    conf

  • DOI
    10.1109/FPGA.1997.624612
  • Filename
    624612