On the accommodation of coolant flow paths in high-density packaging

An analytical study was carried out to highlight the need to work out a tradeoff between the switching speed of logic gates and the average wiring distance, taking into account coolant flow distribution within the information processing system, in order to achieve the maximum processing speed at the system level. One of the models is composed of a row of gate-carrying cards flanked by side boards with networks to complete the three-dimensional wiring. The gates are cooled by forced convection of FC-77 or water. It is shown that the advantage of the 3D configuration in the reduction of wiring distance is seriously compromised by the need to make room for coolant channels within the system to such an extent that in certain cases the single-card system is favored over multiple-card systems. As a model of the single-card system, a square array of logic gates cooled by impinging liquid jets is considered. Again, it is concluded that the space requirement of coolant flows could set the upper bound for the density of logic gate packing. The case studies indicate that a gate-level heat flux of 100 W/cm² is a difficult target to achieve on a processor composed of a large number of gates