DocumentCode
2696654
Title
FPGA synthesis on the XC6200 using IRIS and Trianus/Hades (or from heaven to hell and back again)
Author
Woods, R. ; Ludwig, S. ; Heron, J. ; Trainor, D. ; Gehring, S.
Author_Institution
Inst. of Adv. Microelectron., Queen´´s Univ., Belfast, UK
fYear
1997
fDate
16-18 Apr 1997
Firstpage
155
Lastpage
164
Abstract
The implementation of a number of FIR filter structures in the Xilinx XC6200 technology is presented. The designs have been implemented using a combination of IRIS, an architectural synthesis tool and Trianus/Hades a set of integrated tools for implementing algorithms on Custom Computing Machines. The main attraction of this approach is that it allows algorithms to be compiled quickly allowing performance changes to be made at the architectural level in IRIS rather than at the FPGA layout level
Keywords
FIR filters; field programmable gate arrays; logic design; reconfigurable architectures; Custom Computing Machines; FIR filter structures; FPGA synthesis; IRIS; Trianus/Hades; XC6200; Xilinx XC6200 technology; architectural synthesis tool; Algorithm design and analysis; Field programmable gate arrays; Finite impulse response filter; Hardware; Iris; Laboratories; Logic design; Microelectronics; Scheduling; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines, 1997. Proceedings., The 5th Annual IEEE Symposium on
Conference_Location
Napa Valley, CA
Print_ISBN
0-8186-8159-4
Type
conf
DOI
10.1109/FPGA.1997.624615
Filename
624615
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