Title :
PBTI response to interfacial layer thickness variation in Hf-based HKMG nFETs
Author :
Ioannou, D.P. ; Cartier, E. ; Wang, Y. ; Mittl, S.
Author_Institution :
Microelectron. Div., Semicond. R&D Center, IBM, Essex Junction, VT, USA
Abstract :
The impact of SiO2 interfacial layer (IL) thickness on the Positive Bias Temperature Instability (PBTI) is investigated for nMOSFETs with an IL/High-K/metal/poly-Si gate stack architecture. Results from extensive PBTI measurements using three different measurement methodologies consistently demonstrate that thickening the IL results in threshold voltage (VT) instability reduction and thus significantly enhances PBTI device lifetime. The voltage acceleration is found to increase with thicker IL, while the PBTI fractional recovery is independent of the IL thickness, providing new insights into the PBTI buildup and recovery mechanisms.
Keywords :
MOSFET; hafnium compounds; high-k dielectric thin films; semiconductor device reliability; silicon compounds; Hf-based HKMG nFET; HfO2; PBTI response measurement; SiO2; dielectric interface-high-k-metal-polySi gate stack architecture; interfacial layer thickness variation; nMOSFET; positive bias temperature instability; threshold voltage instability reduction; voltage acceleration; Electron traps; Gate leakage; High K dielectric materials; High-K gate dielectrics; MOSFETs; Microelectronics; Research and development; Stress; Thickness measurement; Voltage; HfO2; High-k dielectrics; PBTI; PBTI recovery; interface; layer; metal gate;
Conference_Titel :
Reliability Physics Symposium (IRPS), 2010 IEEE International
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4244-5430-3
DOI :
10.1109/IRPS.2010.5488679
