DocumentCode
2697057
Title
Device-level reliability simulation for high temperature applications of a modular CMOS foundry process
Author
Ackermann, Markus
Author_Institution
X-FAB Semicond. Foundries AG, Erfurt, Germany
fYear
2010
fDate
2-6 May 2010
Firstpage
1006
Lastpage
1007
Abstract
Introduction of CMOS processes with extended temperature operating conditions up to 448 K had posed great challenges for device reliability. This work will detail a simulator that enables support of robust IC design by application specific device-level lifetime calculation based on reliability models for the most severe intrinsic failure mechanisms of MOSFETs.
Keywords
CMOS integrated circuits; MOSFET; integrated circuit design; integrated circuit reliability; semiconductor device reliability; IC design; MOSFET; application specific device-level lifetime; device-level reliability simulation; intrinsic failure mechanisms; modular CMOS foundry process; temperature 448 K; CMOS process; Foundries; MOSFETs; Qualifications; Semiconductor device modeling; Semiconductor device reliability; Stress; Temperature; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium (IRPS), 2010 IEEE International
Conference_Location
Anaheim, CA
ISSN
1541-7026
Print_ISBN
978-1-4244-5430-3
Type
conf
DOI
10.1109/IRPS.2010.5488687
Filename
5488687
Link To Document