DocumentCode
2697218
Title
Fault simulation on reconfigurable hardware
Author
Abramovici, Miron ; Menon, Prem
Author_Institution
Lucent Technols., Bell Labs., Murray Hill, NJ, USA
fYear
1997
fDate
16-18 Apr 1997
Firstpage
182
Lastpage
190
Abstract
The authors introduce a new approach to fault simulation, using reconfigurable hardware to implement a critical path tracing algorithm. The performance estimate shows that the approach is at least on order of magnitude faster than serial fault emulation used in prior work
Keywords
circuit analysis computing; combinational circuits; fault diagnosis; logic testing; performance evaluation; reconfigurable architectures; virtual machines; combinational circuits; critical path tracing algorithm; fault simulation; performance estimate; reconfigurable hardware; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Electrical fault detection; Emulation; Fault detection; Fault diagnosis; Hardware; Logic;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines, 1997. Proceedings., The 5th Annual IEEE Symposium on
Conference_Location
Napa Valley, CA
Print_ISBN
0-8186-8159-4
Type
conf
DOI
10.1109/FPGA.1997.624618
Filename
624618
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