A novel sample preparation technique for visualizing invisible defects embedded in poly gate

The use of nanoprobing techniques to accomplish transistor parametric data extraction has been widely reported as a method of failure analysis in nanometer scale science and technology. Certain failure mechanisms causing parametric transistor fails are, however, not always successfully identified, even using advanced imaging tools, such as transmission electron microscopy (TEM). Therefore, additional techniques are needed that can reveal the physical root cause of the electrical defects. In this paper, an approach using dopant selective etching of samples for TEM is adopted to enable visualization of invisible defects embedded in the poly gate.