Title :
ESD protection for high-speed receiver circuits
Author :
Jack, Nathan ; Rosenbaum, Elyse
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
Abstract :
ESD-induced gate oxide breakdown is studied in high-speed receiver circuits. A novel biasing circuit increases the breakdown voltage by modulating the potential of the input transistor´s source during ESD. The effectiveness of dual-diode and DTSCR protection of high-speed receiver circuits is examined under various bias conditions.
Keywords :
CMOS analogue integrated circuits; amplifiers; electric breakdown; electrostatic discharge; receivers; semiconductor device reliability; semiconductor diodes; thyristors; transistors; DTSCR protection; ESD protection; ESD-induced gate oxide breakdown; biasing circuit; breakdown voltage; diode-triggered SCR; dual diode; high-speed receiver circuits; transistor source; Capacitance; Circuit testing; Clamps; Differential amplifiers; Electrostatic discharge; MOS devices; Protection; Stress; Variable structure systems; Voltage;
Conference_Titel :
Reliability Physics Symposium (IRPS), 2010 IEEE International
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4244-5430-3
DOI :
10.1109/IRPS.2010.5488722
