A 22 kHz multi-bit switched-capacitor /spl Delta//spl Sigma/ D/A converter with 92 dB dynamic range

Author

Ju, Peijian ; Suyama, Koichi ; Ferguson, P. ; Lee, Wei-Jen

Author_Institution

Dept. of Electr. Eng., Columbia Univ., New York, NY, USA

fYear

1995

fDate

15-17 Feb. 1995

Firstpage

206

Lastpage

207

Abstract

This paper presents a 22 kHz, multi-bit D/A converter using a 5-level switched-capacitor (SC) DAC to provide 92 dB dynamic range and better than -94 dB THD. A 4th-order modulator is used with an oversampling ratio of 32. The multi-level SC DAC uses time- and capacitor-multiplexed methods that yield high linearity with a modest opamp gain in the presence of capacitor mismatches. The 5-level DAC is implemented in a double-poly, 2 /spl mu/m, /spl plusmn/5 V CMOS process from MOSIS without any trimming or calibration.

Keywords

CMOS integrated circuits; digital-analogue conversion; sigma-delta modulation; switched capacitor networks; 2 micron; 22 kHz; 5 V; MOSIS; capacitor multiplexing; double-poly CMOS process; dynamic range; fourth-order modulator; linearity; multi-bit switched-capacitor /spl Delta//spl Sigma/ D/A converter; multi-level SC DAC; oversampling ratio; time multiplexing; Capacitors; Digital signal processing chips; Dynamic range; Frequency; Output feedback; Power dissipation; Solid state circuits; Switching converters; Variable structure systems; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1995. Digest of Technical Papers. 41st ISSCC, 1995 IEEE International

Conference_Location

San Francisco, CA, USA

ISSN

0193-6530

Print_ISBN

0-7803-2495-1

Type

conf

DOI

10.1109/ISSCC.1995.535524

Filename

535524