DocumentCode
2698685
Title
Laser defect correction applications to FPGA based custom computers
Author
Chapman, G.H. ; Dufort, Benoit
Author_Institution
Sch. of Eng. Sci., Simon Fraser Univ., Burnaby, BC, Canada
fYear
1997
fDate
16-18 Apr 1997
Firstpage
240
Lastpage
241
Abstract
The complexity and speed of monolithic FPGA based custom computers has been set by the presence of defective sections which limit chip area. Test FPGAs show that laser link defect avoidance routing around flawed blocks generates delays <50% of active switches, making the error cell distribution nearly invisible
Keywords
computer architecture; fault tolerant computing; field programmable gate arrays; laser beam applications; monolithic integrated circuits; reliability; active switches; chip area; complexity; defective sections; delays; error cell distribution; flawed blocks; laser defect correction applications; laser link defect avoidance routing; monolithic FPGA based custom computers; speed; test FPGAs; Application software; CMOS technology; Delay; Field programmable gate arrays; Laser applications; Laser beam cutting; Laser theory; Routing; Switches; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Custom Computing Machines, 1997. Proceedings., The 5th Annual IEEE Symposium on
Conference_Location
Napa Valley, CA
Print_ISBN
0-8186-8159-4
Type
conf
DOI
10.1109/FPGA.1997.624626
Filename
624626
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