DocumentCode
2699628
Title
A 2.1 GHz 4-bit silicon bipolar synchronous counter
Author
Wüppermann, Bemd ; Langmann, Ulrich
Author_Institution
Ruhr-Univ. Bochum, Germany
fYear
1990
fDate
17-18 Sep 1990
Firstpage
40
Lastpage
43
Abstract
A cascadable 4-bit synchronous counter is presented which has been fabricated with a conventional Si bipolar technology featuring 2-μm emitter stripe width and no self-alignment process steps. It can be operated in the count-up, parallel-data-load, and stop-counting modes up to 2.1 GHz. The high operating speed was made possible by careful transistor and circuit optimization
Keywords
bipolar integrated circuits; cascade networks; counting circuits; integrated logic circuits; 2 micron; 2.1 GHz; 4 bit; bipolar technology; cascadable 4-bit synchronous counter; circuit optimization; count up mode; emitter stripe width; high operating speed; parallel data load mode; stop-counting modes; Clocks; Counting circuits; Delay; Flip-flops; Frequency; Logic design; Logic gates; Resistors; Silicon; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar Circuits and Technology Meeting, 1990., Proceedings of the 1990
Conference_Location
Minneapolis, MN
Type
conf
DOI
10.1109/BIPOL.1990.171121
Filename
171121
Link To Document