Digital design of logarithmic video detector

In this paper, digital implementation of analogue logarithmic amplifiers used to detect the envelope of radar signals are studied for radar analysis systems. RF signals are downconverted to IF band using downconverters. The envelope of IF signal is named Video signal and has significant information about radar. Analogue logarithmic amplifiers (ALogAmp) are used to detect the envelope of IF signals within a wide dynamic range. Since the Video signal is a base band signal, the ADC channel which samples the signal must be DC coupling. The ouput signal levels of the analogue logarithmic amplifiers are mostly high and in addition incompatible with the dynamic range of DC channel of ADC boars in markets. In this study, two techniques are proposed to generate Video signal which is the envelope of IF signal digitally.“Analoque Logarithmic Amplifier Technique” is implemented as the first technique. In this technique, the same structures of the ALogAmps are implemented one-to-one digitally. As a second technique “Increasing number of bits and logarithmic table technique” which increases processed data bits from 14 bits to 32 bits is proposed and synthetized on FPGA.