Title :
Formal operator testability methods for behavioral-level DFT using value ranges
Author :
Seshadri, Sandhya ; Hsiao, Michael S.
Author_Institution :
Mentor Graphics Corp., Warren, NJ, USA
Abstract :
The focus of this research is on the testability analysis of the operators in the behavioral description prior to synthesis. The controllabilities of the inputs to an operator and the observabilities of the outputs of the operation are computed from the value ranges of the variables that serve as the inputs and outputs. The proposed technique uses a formal data flow analysis instead of profiling or simulation, to accurately pin-point the hard-to-test operations in the design. Variable selection for testability enhancement of hard-to-test operations is accomplished based on the computed testability measures for all the involved operations in the behavioral description. The insertion of appropriate testability enhancements is then performed for the hard-to-test operators to achieve significantly higher test coverages, while keeping the design area-performance overhead to a minimum
Keywords :
controllability; data flow analysis; design for testability; observability; behavioral description; behavioral-level DFT; formal data flow analysis; formal operator testability methods; hard-to-test operations; hard-to-test operators; Analytical models; Circuit synthesis; Circuit testing; Computational modeling; Computer graphics; Data analysis; Electric variables control; Input variables; Performance analysis; Performance evaluation;
Conference_Titel :
High-Level Design Validation and Test Workshop, 2000. Proceedings. IEEE International
Conference_Location :
Berkeley, CA
Print_ISBN :
0-7695-0786-7
DOI :
10.1109/HLDVT.2000.889569