• DocumentCode
    2700534
  • Title

    Strain engineering in nanoscale CMOS FinFETs and methods to optimize RS/D

  • Author

    Smith, Casey ; Parthasarathy, Srivatsan ; Coss, Brian E. ; Williams, Jason ; Adhikari, Hemant ; Smith, Greg ; Sassman, Barry ; Hussain, Muhammad Mustafa ; Majhi, Prashant ; Jammy, Raj

  • fYear
    2010
  • fDate
    26-28 April 2010
  • Firstpage
    156
  • Lastpage
    157
  • Abstract
    For the first time, we demonstrate stressor contact etch stop liner (sCESL) modulation of parasitics/external resistance in nonplanar devices. We report 17% saturation drive current enhancement in underlap doped cMOS FinFETs attributed to simultaneous lowering of RS/D via biaxial S/D stress and μo increase via effective uniaxial channel stress. Our observations imply that biaxial strain engineering for reduction of RS/D offers a significant opportunity to realize non-planar CMOSFET performance metrics for the 22nm node and beyond.
  • Keywords
    CMOS integrated circuits; MOSFET; biaxial strain engineering; biaxial stress; effective uniaxial channel stress; nanoscale CMOS FinFET; nonplanar devices; parasitics-external resistance; saturation drive current enhancement; size 22 nm; stressor contact etch stop liner modulation; Capacitive sensors; Compressive stress; Contact resistance; FinFETs; MOS devices; Nanoscale devices; Optimization methods; Residual stresses; Silicides; Tensile stress; CESL; FinFET; RS/D; biaxial stress; stressor;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology Systems and Applications (VLSI-TSA), 2010 International Symposium on
  • Conference_Location
    Hsinchu
  • ISSN
    1524-766X
  • Print_ISBN
    978-1-4244-5063-3
  • Electronic_ISBN
    1524-766X
  • Type

    conf

  • DOI
    10.1109/VTSA.2010.5488905
  • Filename
    5488905