Title :
Shaping interconnect technology for an interconnected society
Author :
Cartuyvels, Rudi ; Tokei, Zsolt ; Beyne, Eric ; Van Hoof, Chris
Author_Institution :
IMEC, Heverlee, Belgium
Abstract :
The continuous drive to increase the functionality of electronic products in terms of computational efficiency and versatility requires a broad range of interconnect technologies. This paper presents an overview of advanced CMOS Interconnect technology scaling towards the 10 nm node enabling the increase in 2D computational density. Functional versatility is enabled by 3D interconnection technologies to build heterogeneous Systems-In-Package. The convergence of bio technologies and electronics will bring a new wave of smart energy efficient miniaturized electronic systems capable to sense and respond to humans.
Keywords :
CMOS integrated circuits; integrated circuit interconnections; system-in-package; 2D computational density; 3D interconnection technologies; CMOS interconnect technology scaling; computational efficiency; electronic products; interconnected society; shaping interconnect technology; size 130 nm; size 32 nm; systems-in-package; CMOS technology; Conductivity; Copper; Dielectric materials; Dielectric thin films; Electromigration; Electronics packaging; Isolation technology; Metallization; Testing;
Conference_Titel :
VLSI Technology Systems and Applications (VLSI-TSA), 2010 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-5063-3
Electronic_ISBN :
1524-766X
DOI :
10.1109/VTSA.2010.5488910
