DocumentCode
2700957
Title
Via mid through silicon vias — the manufacturability outlook
Author
Arkalgud, Sitaram
Author_Institution
SEMATECH, Albany, NY, USA
fYear
2010
fDate
26-28 April 2010
Firstpage
106
Lastpage
107
Abstract
The potential for via-mid through-silicon vias (TSVs) can be considerable, since their use allows not only a reduction in interconnect length from several mm to several microns, but also a tremendous increase in bandwidth between the stacked chips. The net result is less power consumption, higher performance, increased device density within a given chip footprint, and greater potential to integrate diverse technologies at an overall lower cost. This presentation will cover the manufacturability outlook for via-mid TSVs including equipment, process, and metrology maturity.
Keywords
three-dimensional integrated circuits; manufacturability outlook; via mid through silicon vias; Acoustic signal detection; Costs; Infrared detectors; Manufacturing; Metrology; Scanning electron microscopy; Silicon; Through-silicon vias; Transmission electron microscopy; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology Systems and Applications (VLSI-TSA), 2010 International Symposium on
Conference_Location
Hsinchu
ISSN
1524-766X
Print_ISBN
978-1-4244-5063-3
Electronic_ISBN
1524-766X
Type
conf
DOI
10.1109/VTSA.2010.5488930
Filename
5488930
Link To Document