• DocumentCode
    2701118
  • Title

    Back-gate mirror doping for fully depleted planar SOI transistors with thin buried oxide

  • Author

    Yan, Ran ; Duane, Russell ; Razavi, Pedram ; Afzalian, Aryan ; Ferain, Isabelle ; Lee, Chi-Woo ; Dehdashti, Nima ; Nguten, B. ; Bourdelle, Konstantin K. ; Colinge, J.P.

  • Author_Institution
    Tyndall Nat. Inst., Univ. Coll. Cork, Cork, Ireland
  • fYear
    2010
  • fDate
    26-28 April 2010
  • Firstpage
    76
  • Lastpage
    77
  • Abstract
    In this paper, we analyze LDD depletion effects in Fully-Depleted SOI (FDSOI) devices with thin-BOX and ground plane (GP). Back-gate engineering is introduced to reduce the series resistance and threshold voltage shifts. We show that short-channel effects are rather insensitive to SOI layer thickness variations and remains well controlled for gate lengths down to 15nm.
  • Keywords
    doping; silicon-on-insulator; SOI layer thickness variations; back-gate engineering; back-gate mirror doping; fully depleted planar SOI transistors; ground plane; size 15 nm; thin buried oxide; thin-BOX; Doping; Mirrors; LDD depletion effect; back-gate engineering; fully depleted silicon-oninsulation (FDSOI) MOSFET; thin buried-oxide (BOX);
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology Systems and Applications (VLSI-TSA), 2010 International Symposium on
  • Conference_Location
    Hsinchu
  • ISSN
    1524-766X
  • Print_ISBN
    978-1-4244-5063-3
  • Electronic_ISBN
    1524-766X
  • Type

    conf

  • DOI
    10.1109/VTSA.2010.5488939
  • Filename
    5488939