The investigation of the stress-induced traps and its correlation to PBTI in high-kdielectrics nMOSFETs by the RTN measurement technique

Author

Chang, C.H. ; Hsieh, E.R. ; Chung, Steve S. ; Lin, Y.H. ; Tsai, C.H. ; Tsai, C.T. ; Ma, G.H.

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2010

fDate

26-28 April 2010

Firstpage

70

Lastpage

71

Abstract

The PBTI is an important issue in the high-k dielectric nMOSFET devices in the present CMOS technology. In this paper, Random telegraph noise (RTN) technique was employed to investigate the stressed-induced traps and their correlation to the hot carrier and PBTI effects. It was found that the positions of stress-induced traps (SITs) are mostly located in the high-k layer, but not close to the high-k/SiO₂ interface. The SITs under PBTI stress exhibit a larger amount of ΔN_S/N_S in the ΔI_D/I_D fluctuation as a result of the traps which are generated close to the source side and lead to the V_T instability. This new finding is helpful toward the understanding of the BTI effect in high-k gate dielectric MOSFETs.

Keywords

CMOS integrated circuits; correlation methods; electron traps; high-k dielectric thin films; CMOS technology; VT instability; correlation; high-k dielectrics nMOSFET; random telegraph noise; source side; stress-induced traps; CMOS technology; Electron traps; Energy states; High K dielectric materials; High-K gate dielectrics; Hot carriers; MOSFETs; Measurement techniques; Stress; Telegraphy; High-k (HfSiON) dielectrics nMOSFETs; Positive Bias Temperature Instability (PBTI); Random Telegraph Noise (RTN);

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology Systems and Applications (VLSI-TSA), 2010 International Symposium on

Conference_Location

Hsinchu

ISSN

1524-766X

Print_ISBN

978-1-4244-5063-3

Electronic_ISBN

1524-766X

Type

conf

DOI

10.1109/VTSA.2010.5488944

Filename

5488944