Title :
Circuit design techniques for low-voltage operating and/or giga-scale DRAMs
Author :
Yamagata, T. ; Tomishima, S. ; Tsukude, M. ; Hashizume, Y. ; Arimoto, K.
Author_Institution :
ULSI Lab., Mitsubishi Electr. Corp., Itami, Japan
Abstract :
As use of battery-operated machines, such as hand-held computers and PDAs, becomes wider, low-voltage/low-power DRAMs are required. Low-voltage technologies are also required in giga-scale DRAMs with scaled-down voltage. This paper describes low-voltage circuit design techniques to meet these demands.
Keywords :
DRAM chips; integrated circuit design; PDAs; battery-operated machines; giga-scale DRAMs; hand-held computers; low-power technologies; low-voltage circuit design; Application specific integrated circuits; CMOS logic circuits; CMOS process; Circuit synthesis; MOS devices; Random access memory; Solid state circuits; Subthreshold current; Timing; Very large scale integration;
Conference_Titel :
Solid-State Circuits Conference, 1995. Digest of Technical Papers. 41st ISSCC, 1995 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-2495-1
DOI :
10.1109/ISSCC.1995.535542
