Title :
Electrical characterization of field-enhanced poly-Si nanowire SONOS memory
Author :
Wu, Chun-Yu ; Liao, Ta-Chuan ; Yu, Ming-H ; Chen, Sheng-Kai ; Tsai, Chung-Min ; Cheng, Huang-Chung
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
A novel omega-shaped-gated (Ω-Gate) poly-Si thin-film transistor (TFT) silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory devices fabricated by utilizing a simple process sequence are proposed for the first time. The Ω-Gate structure inherently covered two sharp corners constructed simply by a sidewall spacer formation. Due to the sharp corner geometry, the local electric fields across the tunneling oxide can be enhanced effectively, thus improving the memory performance. Based on this field enhanced scheme, the experimental results of Ω-Gate TFT SONOS reveals excellent program/erase (P/E) efficiency and larger memory window as compared to the conventional planar (CP) counterpart. Therefore, such an Ω-Gate TFT SONOS memory using simple and low-cost processes is very promising for the embedded flash on the system-on-panel applications.
Keywords :
elemental semiconductors; flash memories; nanowires; random-access storage; silicon; thin film transistors; Ω-gate TFT SONOS memory; Ω-gate structure; Si; electrical characterization; field enhanced scheme; field-enhanced polySi nanowire SONOS memory; local electric fields; omega-shaped-gated polySi thin-film transistor; program-erase efficiency; sharp corner geometry; sidewall spacer formation; silicon-oxide-nitride-oxide-silicon nonvolatile memory devices; system-on-panel; tunneling oxide; Anisotropic magnetoresistance; Etching; Geometry; Glass; Lithography; Nonvolatile memory; SONOS devices; Strips; Substrates; Thin film transistors;
Conference_Titel :
VLSI Technology Systems and Applications (VLSI-TSA), 2010 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4244-5063-3
Electronic_ISBN :
1524-766X
DOI :
10.1109/VTSA.2010.5488948