DocumentCode
2701628
Title
CMOS folding ADCs with current-mode interpolation
Author
Flynn, M.P. ; Allstot, D.J.
Author_Institution
Nat. Semicond. Corp., Santa Clara, CA, USA
fYear
1995
fDate
15-17 Feb. 1995
Firstpage
274
Lastpage
275
Abstract
Folding and interpolating converters offer the speed of flash type devices but at a fraction of the area and power consumption. The performance of bipolar based folding converters has come to rival that of other topologies. This work describes a folding architecture that is compatible with digital CMOS. For speed, the analog circuitry is fully-differential continuous-time current-mode and open loop. This folding architecture is implemented in 6 bit and 8 bit ADCs functioning at 3.3 V.
Keywords
CMOS integrated circuits; analogue-digital conversion; interpolation; mixed analogue-digital integrated circuits; 3.3 V; 6 bit; 8 bit; CMOS folding ADCs; continuous-time type; current-mode interpolation; current-mode operation; digital CMOS; fully-differential circuitry; open loop configuration; Capacitance; Circuit topology; Energy consumption; Interpolation; MOSFETs; Preamplifiers; Signal generators; Signal resolution; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1995. Digest of Technical Papers. 41st ISSCC, 1995 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-2495-1
Type
conf
DOI
10.1109/ISSCC.1995.535553
Filename
535553
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