Title :
A comprehensive TCAM test scheme: An optimized test algorithm considering physical layout and combining scan test with at-speed BIST design
Author :
Wu, Hsiang-Huang ; Lee, Jih-Nung ; Chiang, Ming-Cheng ; Liu, Po-Wei ; Wu, Chi-Feng
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Maryland, College Park, MD, USA
Abstract :
Considering the physical layout, a comprehensive TCAM test scheme divides TCAM test into test for TCAM core and test for peripheral circuit. Besides, it schedules the existing test algorithms to develop an optimized test algorithm.
Keywords :
built-in self test; content-addressable storage; at-speed BIST design; built-in self-test; comprehensive TCAM test scheme; memory testing; optimized test algorithm; scan test; ternary content addressable memory; Algorithm design and analysis; Attenuation; Built-in self-test; Design optimization; Diffraction; Microwave propagation; Nonuniform electric fields; Polarization; Propagation losses; Testing; March test algorithm; built-in self-test (BIST); content addressable memory (CAM); memory testing; ternary content addressable memory (TCAM);
Conference_Titel :
Test Conference, 2009. ITC 2009. International
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4244-4868-5
Electronic_ISBN :
978-1-4244-4867-8
DOI :
10.1109/TEST.2009.5355536
