DocumentCode
2701912
Title
Hierarchical yield estimation of large analog integrated circuits
Author
Kurker, Christopher M. ; Paulos, John J. ; Gyurcsik, Ronald S. ; Lu, Jye-Chyi
fYear
1992
fDate
3-6 May 1992
Abstract
A hierarchical methodology for parametric yield estimation is presented. The methodology employs a combination of behavioral and regression modeling. Three related techniques for hierarchical yield estimation are demonstrated on a large BiCMOS circuit combining discrete-time and continuous-time operation.
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1992., Proceedings of the IEEE 1992
Conference_Location
Boston, MA, USA
Print_ISBN
0-7803-0246-X
Type
conf
DOI
10.1109/CICC.1992.589964
Filename
5727277
Link To Document