DocumentCode
2702208
Title
Electrical and mechanical modeling of embedded capacitors
Author
Rao, Yang ; Wong, C.P. ; Qu, Jianmin
Author_Institution
Center of Packaging Res., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
1999
fDate
14-17 Mar 1999
Firstpage
158
Lastpage
162
Abstract
Integral passives have many advantages, such as improving packaging efficiency and electrical performance, reducing the use of PWB real estate, eliminating assembly to board, minimizing solder joint failure and enhanced reliability. The objective of this research is to reduce the size and enhance the performance of a multichip module (MCM) used in aerospace accelerometers and gyroscopes by incorporating all the discrete components into the low-cost PWB MCM substrate. To achieve this goal, we intend to use the low temperature process to incorporate decoupling capacitors directly into the substrate during the PWB manufacturing process. Computer simulation and modeling of embedded capacitors were carried out to predict the capacitance range, fabrication tolerance, interference between adjacent capacitors and the effects of vias, etc. ANSYS commercial finite element software was used for the modeling work, which includes electric and thermomechanical analyses of embedded capacitors with/without vias, and the interference between two adjacent capacitors. Attention was paid to the effects of different embedded capacitor dielectric constants and geometries. The FEM model provides a good picture of the distribution, electric performance and tolerance of capacitors for the design and manufacturing processes
Keywords
accelerometers; aerospace instrumentation; capacitance; capacitors; finite element analysis; gyroscopes; integrated circuit modelling; integrated circuit packaging; multichip modules; permittivity; ANSYS finite element software; FEM model; MCM; PWB manufacturing process; PWB real estate; adjacent capacitor interference; aerospace accelerometers; aerospace gyroscopes; assembly to board; capacitance range; computer simulation; decoupling capacitors; design processes; discrete components; electric analysis; electric performance; electrical modeling; electrical performance; embedded capacitor dielectric constant; embedded capacitor geometries; embedded capacitors; fabrication tolerance; integral passives; low temperature process; low-cost PWB MCM substrate; manufacturing processes; mechanical modeling; modeling; multichip module; packaging efficiency; reliability; solder joint failure; thermomechanical analysis; tolerance; via effects; Accelerometers; Assembly; Capacitors; Gyroscopes; Interference; Manufacturing processes; Multichip modules; Packaging; Soldering; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Packaging Materials: Processes, Properties and Interfaces, 1999. Proceedings. International Symposium on
Conference_Location
Braselton, GA
Print_ISBN
0-930815-56-4
Type
conf
DOI
10.1109/ISAPM.1999.757304
Filename
757304
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