Test access mechanism for multiple identical cores

Author

Giles, Grady ; Wang, Jing ; Sehgal, Anuja ; Balakrishnan, Kedamath J. ; Wingfield, James

Author_Institution

Adv. Micro Devices Austin, Austin, TX, USA

fYear

2009

fDate

1-6 Nov. 2009

Firstpage

1

Lastpage

10

Abstract

A new test access mechanism (TAM) for multiple identical embedded cores is proposed. It exploits the identical nature of the cores and modular pipelined circuitry to provide scalable and flexible capabilities to make tradeoffs between test time and diagnosis over the manufacturing maturity cycle from low-yield initial production to high-yield, high-volume production. The test throughput gains of various configurations of this TAM are analyzed. Forward and reverse protocol translations for core patterns applied with this TAM are described.

Keywords

logic design; logic testing; microprocessor chips; system-on-chip; SoC; microprocessor designs; modular pipelined circuitry; multiple identical embedded cores; reverse protocol translations; system-on-chip testing; test access mechanism; Automatic test pattern generation; Broadcasting; Circuit testing; Fault detection; Flexible manufacturing systems; Microprocessors; Pipeline processing; Production; Throughput; Vehicles;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2009. ITC 2009. International

Conference_Location

Austin, TX

Print_ISBN

978-1-4244-4868-5

Electronic_ISBN

978-1-4244-4867-8

Type

conf

DOI

10.1109/TEST.2009.5355560

Filename

5355560