DocumentCode
2702447
Title
ShellCase ultrathin chip size package
Author
Badihi, A.
Author_Institution
ShellCase, Jerusalem
fYear
1999
fDate
14-17 Mar 1999
Firstpage
236
Lastpage
240
Abstract
As the demand for ever-smaller electronic and optical devices grows, manufacturers are seeking ways to reduce IC size and weight. A fully packaged integrated circuit can now be as small and thin as the chip itself. The chip size package (CSP) is fundamentally changing the way electronic products are being designed. The ShellCase CSP, for peripheral, area array and BGA applications and for optical applications, is distinguished by its ultra-thin profile, its reliability, and its cost-effective wafer-level process
Keywords
ball grid arrays; chip scale packaging; integrated circuit design; integrated circuit reliability; integrated circuit testing; integrated optoelectronics; BGA applications; CSP; IC size; IC weight; ShellCase CSP; ShellCase ultrathin chip size package; area array packaging; chip size; chip size package; chip thickness; cost-effective wafer-level process; electronic device size; electronic product design; fully packaged integrated circuit; optical applications; optical device size; peripheral leaded packaging; reliability; ultra-thin profile; Chip scale packaging; Electronics packaging; Integrated circuit packaging; Integrated circuit reliability; Manufacturing; Optical arrays; Optical devices; Photonic integrated circuits; Product design; Wafer scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Packaging Materials: Processes, Properties and Interfaces, 1999. Proceedings. International Symposium on
Conference_Location
Braselton, GA
Print_ISBN
0-930815-56-4
Type
conf
DOI
10.1109/ISAPM.1999.757319
Filename
757319
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