• DocumentCode
    2702758
  • Title

    Development of the wafer level compressive-flow underfill encapsulant

  • Author

    Shi, S.H. ; Yamashita, T. ; Wong, C.P.

  • Author_Institution
    Center for Packaging Res., Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    1999
  • fDate
    14-17 Mar 1999
  • Firstpage
    337
  • Lastpage
    343
  • Abstract
    This paper describes a wafer-level compressive flow underfill (WLCFU) for a novel SMT transparent flip-chip technology. In this flip-chip technology, the liquid fluxable WLCFU is coated over a patterned and bumped wafer. The WLCFU layer is dried at elevated temperature to form a solid layer. The coated bumped wafer is then diced into individual chips. These chips can then be placed on a substrate such as a PWB using standard SMT equipment. At elevated temperature (100-180°C) during solder reflow, the solid WLCFU layer can be re-melted and easily fills the gaps between chip and board. After solder reflow (190-200°C), the WLCFU material can be fully cured. B-stage epoxy technology was used to develop the WLCFU. A fluxing agent was added to provide sufficient fluxing for solder interconnection. A thermo-gravimetric analyzer (TGA) was used to investigate the drying kinetics and material weight loss during reflow. Differential scanning calorimetry (DSC) was used to study the WLCFU curing kinetics. A thermo-mechanical analyzer (TMA) was used to investigate the heat flex temperature (TMA Tg) and the coefficient of thermal expansion (CTE). A dynamic-mechanical analyzer (DMA) was used to measure the storage modulus (E´) and cross-linking density (ρ) of the cured material. A rheometer was used to investigate viscosity (η) change with temperature during solder reflow. Preliminary results showed the feasibility of the proposed novel flip-chip technology with the developed WLCFU material. The basic qualifications of the WLCFU material were examined. Some technical barriers related to this technology are also discussed
  • Keywords
    assembling; coating techniques; differential scanning calorimetry; drying; elastic moduli; encapsulation; flip-chip devices; heat treatment; integrated circuit packaging; melting; reaction kinetics; reflow soldering; rheology; surface mount technology; thermal expansion; viscosity; 100 to 180 C; 190 to 200 C; B-stage epoxy technology; DSC; PWB; SMT transparent flip-chip technology; TGA; TMA; WLCFU curing kinetics; WLCFU layer drying; WLCFU material curing; chip placement; coated bumped wafer dicing; coefficient of thermal expansion; cross-linking density; cured material; differential scanning calorimetry; drying kinetics; dynamic-mechanical analyzer; flip-chip technology; fluxing agent; gap filling; heat flex temperature; liquid fluxable WLCFU; material weight loss; patterned/bumped wafer coating; rheometer; solder interconnection; solder reflow; solid WLCFU layer re-melting; standard SMT equipment; storage modulus; thermo-gravimetric analyzer; thermo-mechanical analyzer; viscosity; wafer level compressive-flow underfill encapsulant; wafer-level compressive flow underfill; Calorimetry; Curing; Density measurement; Kinetic theory; Material storage; Solids; Surface-mount technology; Temperature; Thermal expansion; Thermomechanical processes;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Packaging Materials: Processes, Properties and Interfaces, 1999. Proceedings. International Symposium on
  • Conference_Location
    Braselton, GA
  • Print_ISBN
    0-930815-56-4
  • Type

    conf

  • DOI
    10.1109/ISAPM.1999.757335
  • Filename
    757335