Title :
Memory organization of a single-chip video signal processing system with embedded DRAM
Author :
Hilgenstock, Jörg ; Hermann, K. ; Pirsch, Peter
Author_Institution :
Lab. fur Informationstechnol., Hannover Univ., Germany
Abstract :
A programmable single-chip multiprocessor system for video coding applications has been developed. It integrates four processing elements, on-chip DRAM, and application-specific interfaces. The integrated DRAM is primarily used as frame buffer and makes external memory for most applications obsolete. For fast access to local data segments also static RAM is integrated in each processing element
Keywords :
DRAM chips; buffer storage; embedded systems; memory architecture; multiprocessing systems; video signal processing; application-specific interfaces; embedded DRAM; frame buffer; integrated DRAM; on-chip DRAM; programmable single-chip multiprocessor; single-chip video signal processing; video coding; Bandwidth; Computer architecture; Delay; Hip; Multiprocessing systems; Random access memory; Read-write memory; Telephony; Video coding; Video signal processing;
Conference_Titel :
VLSI, 1999. Proceedings. Ninth Great Lakes Symposium on
Conference_Location :
Ypsilanti, MI
Print_ISBN :
0-7695-0104-4
DOI :
10.1109/GLSV.1999.757373
