Title :
A low power charge-recycling CMOS clock buffer
Author :
Wang, Xiaohui ; Porod, Wolfgang
Author_Institution :
Dept. of Electr. Eng., Notre Dame Univ., IN, USA
Abstract :
A low power CMOS clock buffer based on charge recycling technique is presented. To accomplish the charge recycling process and avoid introducing the extra short circuit current during the recycling phase, an extra switching circuit and control signal are utilized to keep inverters momentarily tri-state. The feasibility of this design and its improved power efficiency are demonstrated by simulations
Keywords :
CMOS integrated circuits; SPICE; buffer circuits; clocks; digital simulation; switching circuits; charge-recycling CMOS clock buffer; control signal; inverters; power efficiency; short circuit current; simulation; switching circuit; tri-state; Capacitors; Circuit simulation; Clocks; Energy consumption; Inverters; MOSFETs; Neural networks; Recycling; SPICE; Switches;
Conference_Titel :
VLSI, 1999. Proceedings. Ninth Great Lakes Symposium on
Conference_Location :
Ypsilanti, MI
Print_ISBN :
0-7695-0104-4
DOI :
10.1109/GLSV.1999.757422
