Title :
A 0.5 μm fully scaled two-level metal fully planarized interconnect structure fabricated with X-ray lithography
Author :
Moy, D. ; Wang, Luke K. ; Seeger, D.E. ; Silverman, J.P. ; Hu, C.K. ; Kaufman, F.B. ; Ray, A.K. ; Jaso, M.A. ; Mazzeo, N.J.
Abstract :
A fully planarized two-level-metal structure has been successfully fabricated at 0.5 μm groundrules with the use of X-ray lithography at all processing levels. A 0.5-μm minimum feature size was required for all levels, including the second-level metal. Planarized PECVD oxide and PECVD nitride were employed as dual dielectric layers below M1 and M2. Chemical vapor deposition (CVD) W studs formed by W etchback served as vertical connections for interlevel vias and contacts. All ten lithography patterning steps were performed with X-ray exposures to determine what possible implications this emerging technology might have on the implementation of the interconnect levels
Keywords :
CMOS integrated circuits; SRAM chips; VLSI; X-ray lithography; chemical vapour deposition; integrated circuit technology; metallisation; tungsten; 0.5 micron; CVD; PECVD nitride; PECVD oxide; ULSI; W studs; X-ray lithography; fully planarized interconnect structure; interlevel vias; planarization; planarized two-level-metal structure; vertical connections;
Conference_Titel :
VLSI Technology, 1990. Digest of Technical Papers.1990 Symposium on
Conference_Location :
Honolulu, Hawaii, USA
DOI :
10.1109/VLSIT.1990.110982
