• DocumentCode
    27051
  • Title

    High-Frequency Scalable Modeling and Analysis of a Differential Signal Through-Silicon Via

  • Author

    Joohee Kim ; Jonghyun Cho ; Joungho Kim ; Jong-Min Yook ; Jun Chul Kim ; Junho Lee ; Kunwoo Park ; Jun So Pak

  • Author_Institution
    Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
  • Volume
    4
  • Issue
    4
  • fYear
    2014
  • fDate
    Apr-14
  • Firstpage
    697
  • Lastpage
    707
  • Abstract
    An analytic scalable model of a differential signal through-silicon via (TSV) is proposed. This TSV is a ground-signal-signal-ground (GSSG)-type differential signal TSV. Each proposed analytical equation in the model is a function of the structural and material design parameters of the TSV and the bump, which is scalable. The proposed model is successfully validated with measurements up to 20 GHz for the fabricated test vehicles. Additionally, the scalability of the proposed model is verified with simulations by using Ansoft HFSS to vary the design parameters, such as the TSV diameter, pitch between TSVs, and TSV oxide thickness. On the basis of the proposed scalable model, the electrical behaviors of the GSSG-type differential signal TSV are analyzed with respect to the design variations in the frequency domain. Additionally, the electrical performances of a GSSG-type differential signal TSV are evaluated and compared to that of a ground-signal-ground-type single-ended signal TSV, such as insertion loss, characteristic impedance, voltage/timing margin, and noise immunity.
  • Keywords
    frequency-domain analysis; integrated circuit design; integrated circuit modelling; three-dimensional integrated circuits; Ansoft HFSS; GSSG; TSV oxide thickness; analytical equation; characteristic impedance; differential signal through-silicon via analysis; electrical behaviors; fabricated test vehicles; frequency domain; ground-signal-signal-ground-type differential signal TSV; high-frequency scalable modeling; insertion loss; material design parameters; noise immunity; structural function; voltage-timing margin; Analytical models; Capacitance; Mathematical model; Metals; Silicon; Substrates; Through-silicon vias; Differential signal through-silicon via (TSV); scalable model; single-ended signal TSV; three-dimensional integrated circuit (3-D IC);
  • fLanguage
    English
  • Journal_Title
    Components, Packaging and Manufacturing Technology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    2156-3950
  • Type

    jour

  • DOI
    10.1109/TCPMT.2013.2239362
  • Filename
    6762974