DocumentCode :
2705708
Title :
Dynamic arbitrary jitter injection method for ≫6.5Gb/s SerDes testing
Author :
Fujibe, T. ; Suda, M. ; Yamamoto, K. ; Nagata, Y. ; Fujita, K. ; Watanabe, D. ; Okayasu, T.
Author_Institution :
ADVANTEST Corp., Meiwa, Japan
fYear :
2009
fDate :
1-6 Nov. 2009
Firstpage :
1
Lastpage :
10
Abstract :
A dynamic arbitrary jitter injection method that can be integrated into our high speed and high density CMOS timing generator has been developed. This method makes it possible to inject arbitrary jitter including periodic jitter, random jitter and data dependent jitter in order to realize flexible SerDes device testing. By this method, furthermore, jitter injection is dynamically and synchronously controllable according to a test pattern. We have implemented our jitter injection method in a prototype chip to demonstrate the concept. The chip includes a 6.5 Gb/s timing generator and was fabricated by a 90 nm CMOS process. Area and power consumption for each edge including the jitter injection scheme and timing generator are 0.2 mm2 and 43.8 mW respectively.
Keywords :
CMOS digital integrated circuits; integrated circuit testing; jitter; signal generators; timing circuits; SerDes testing; bit rate 6.5 Gbit/s; data dependent jitter; dynamic arbitrary jitter injection method; high density CMOS timing generator; periodic jitter; power 43.8 mW; prototype chip; random jitter; size 90 nm; CMOS process; Crosstalk; Energy consumption; Performance evaluation; Prototypes; Signal generators; Synchronization; Testing; Timing jitter; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2009. ITC 2009. International
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4244-4868-5
Electronic_ISBN :
978-1-4244-4867-8
Type :
conf
DOI :
10.1109/TEST.2009.5355735
Filename :
5355735
Link To Document :
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