DocumentCode :
2705853
Title :
Fabrication of three-dimensional IC using `cumulatively bonded IC´ (CUBIC) technology
Author :
Hayashi, Yasuhiro ; Wada, S. ; Kajiyana, K. ; Oyama, K. ; Koh, R. ; Takahashi, S. ; Kunio, T.
fYear :
1990
fDate :
4-7 June 1990
Firstpage :
95
Lastpage :
96
Abstract :
A technology is proposed for the fabrication of three-dimensional integrated circuits (3D-ICs) having a large number of device layers, referred to as `cumulatively bonded IC´ (CUBIC) technology wherein several thin-film devices are bonded cumulatively. The technology was used to fabricate a two-active-layer device having a bulk-Si NMOSFET lower layer and a thinned NMOSFET upper layer. The CUBIC technology, essentially a face-to-back device bonding technology, is applicable to fabricating 3D-ICs having more than three active-device layers. The process consists of two subprocesses-wafer thinning and thin-film lamination. Preferential polishing was used for wafer thinning and bump/tool contacts were used for device-to-device vertical interconnections
Keywords :
MOS integrated circuits; insulated gate field effect transistors; integrated circuit technology; polishing; CUBIC technology; Si; bulk NMOSFET lower layer; bump/tool contacts; cumulatively bonded IC; device layers; device-to-device vertical interconnections; face-to-back device bonding technology; polishing; subprocesses; thin-film devices; thin-film lamination; thinned NMOSFET upper layer; three active-device layers; three-dimensional IC; two-active-layer device; wafer thinning;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 1990. Digest of Technical Papers.1990 Symposium on
Conference_Location :
Honolulu, Hawaii, USA
Type :
conf
DOI :
10.1109/VLSIT.1990.111025
Filename :
5727485
Link To Document :
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