DocumentCode
2706227
Title
An outlier detection based approach for PCB testing
Author
He, Xin ; Malaiya, Yashwant ; Jayasumana, Anura P. ; Parker, Kenneth P. ; Hird, Stephen
Author_Institution
Dept. of Electr. & Comput. Eng., Colorado State Univ., Fort Collins, CO, USA
fYear
2009
fDate
1-6 Nov. 2009
Firstpage
1
Lastpage
10
Abstract
Capacitive Leadframe testing is an effective approach for detecting faults in printed circuit boards. Capacitance measurements, however, are affected by mechanical variations during testing and by tolerances of electrical parameters of components, making it difficult to use threshold based techniques for defect detection. A novel approach is presented for identifying boards that are likely to be outliers. Based on Principal Components Analysis (PCA), this approach treats the set of capacitance measurements of individual connectors or sockets in a holistic manner to overcome the measurement and component parameter variations inherent in test data. The effectiveness of the method is evaluated using measurements on three different boards. Enhancements to the technique to increase the resolution of the method are presented and evaluated.
Keywords
capacitance measurement; fault location; principal component analysis; printed circuit testing; PCB testing; capacitance measurements; capacitive leadframe testing; defect detection; fault detection; outlier detection; principal components analysis; printed circuit boards; Capacitance measurement; Circuit faults; Circuit testing; Connectors; Electrical fault detection; Pins; Principal component analysis; Printed circuits; Sockets; System testing; Board testing; capacitive open testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2009. ITC 2009. International
Conference_Location
Austin, TX
Print_ISBN
978-1-4244-4868-5
Electronic_ISBN
978-1-4244-4867-8
Type
conf
DOI
10.1109/TEST.2009.5355761
Filename
5355761
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