• DocumentCode
    2706394
  • Title

    A 12.8-MHz sigma-delta modulator with 16-bit performance

  • Author

    Brandt, Brian P. ; Wingard, Drew E. ; Wooley, Bruce A.

  • fYear
    1990
  • fDate
    7-9 June 1990
  • Firstpage
    27
  • Lastpage
    28
  • Abstract
    The authors describe a CMOS second-order Σ-Δ modulator that does not require error correction or component trimming to achieve virtually ideal 16-b performance at a conversion rate of 50 kHz. This modulator is a fully differential circuit that operates from a single 5-V power supply and does not require the use of precision sample-and-hold circuitry. With an oversampling ratio of 256 and a clock rate of 12.8 MHz, an experimental implementation of the modulator achieves a 98-dB dynamic range and 94-dB linearity. The nearly ideal 16-b performance of the modulator and its small area of 0.39 mm2 and power dissipation of only 13.8 mW make it suitable for use as a digital-audio quality analog interface within digital signal processing chips and systems
  • Keywords
    CMOS integrated circuits; Hi-Fi equipment; VLSI; analogue-digital conversion; integrated circuit technology; 12.8 MHz; 13.8 mW; 16 bit; 16-bit performance; 5 V; 5-V power supply; 50 kHz; CMOS; clock rate; conversion rate; digital signal processing chips; digital-audio quality analog interface; dynamic range; experimental implementation; fully differential circuit; linearity; oversampling ratio; power dissipation; second-order Σ-Δ modulator; sigma-delta modulator;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 1990. Digest of Technical Papers., 1990 Symposium on
  • Conference_Location
    Honolulu, Hawaii, USA
  • Type

    conf

  • DOI
    10.1109/VLSIC.1990.111078
  • Filename
    5727512