• DocumentCode
    2706790
  • Title

    Scalable Coherent Interface

  • Author

    Alnæs, Knut ; Kristiansen, Emst H. ; Gustavson, David B. ; James, David V.

  • Author_Institution
    Dolphin Server Technol. AS, Oslo, Norway
  • fYear
    1990
  • fDate
    8-10 May 1990
  • Firstpage
    446
  • Lastpage
    453
  • Abstract
    The Scalable Coherent Interface Project (IEEE P1596) is establishing an interface standard for very-high-performance multiprocessors, supporting a cache-coherent-memory model scalable to systems with up to 64K nodes. The P1596 Scalable Coherent Interface (SCI) will supply a peak bandwidth per node of 1 Gb/s. The SCI standard should facilitate assembly of processor, memory, I/O and bus bridge cards from multiple vendors into massively parallel systems with throughput far above what is possible today. The SCI standard encompasses two levels of interface, a physical level and a logical level. The physical level specifies electrical, mechanical and thermal characteristics of connectors and cards that meet the standard. The logical-level describes the address space, data transfer protocols, cache coherence mechanisms, synchronization primitives and error recovery. Logical-level issues such as packet formats, packet transmission, transaction handshake, flow control, and cache coherence are addressed
  • Keywords
    buffer storage; computer interfaces; multiprocessing systems; standards; 1 Gbit/s; IEEE P1596; SCI standard; Scalable Coherent Interface Project; address space; cache coherence mechanisms; cache-coherent-memory model; cards; connectors; data transfer protocols; electrical characteristics; error recovery; flow control; interface standard; logical level; massively parallel systems; mechanical characteristics; packet formats; packet transmission; peak bandwidth; physical level; synchronization primitives; thermal characteristics; transaction handshake; very-high-performance multiprocessors; Assembly systems; Backplanes; Bandwidth; Computer interfaces; Dolphins; High performance computing; Linear accelerators; Multiprocessing systems; Protocols; Transmission lines;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    CompEuro '90. Proceedings of the 1990 IEEE International Conference on Computer Systems and Software Engineering
  • Conference_Location
    Tel-Aviv
  • Print_ISBN
    0-8186-2041-2
  • Type

    conf

  • DOI
    10.1109/CMPEUR.1990.113656
  • Filename
    113656