A tunable CMOS-DRAM voltage limiter with stabilized feedback amplifier

Author

Horiguchi, M. ; Aoki, M. ; Etoh, J. ; Tanaka, H. ; Ikenaga, S. ; Itoh, K. ; Kajigaya, K. ; Kotani, H. ; Ohshima, K. ; Matsumoto, T.

fYear

1990

fDate

7-9 June 1990

Firstpage

75

Lastpage

76

Abstract

The authors present two developments for DRAM voltage limiters: a precise internal-voltage generator composed of a PMOS threshold-voltage-difference generator and a tunable voltage-up converter with fuse trimming; and a stabilized driver composed of a feedback amplifier with compensation for a time-dependent load. These circuits provide a voltage not susceptible to the supply-voltage and substrate-voltage bouncings, temperature variation, and threshold-voltage deviation due to the process fluctuation, while maintaining CMOS-DRAM process compatibility. Moreover, feedback-loop stability and frequency response are maintained by ensuring a phase margin of 55° at a unity-gain frequency of 10 MHz using compensation through zero insertion. Implementation of these new circuits in a 16-Mb CMOS DRAM is reported

Keywords

CMOS integrated circuits; DRAM chips; VLSI; driver circuits; feedback; limiters; 10 MHz; 16 Mbit; PMOS threshold-voltage-difference generator; compensation; feedback amplifier; feedback-loop stability; frequency response; fuse trimming; internal-voltage generator; phase margin; process fluctuation; stabilized driver; stabilized feedback amplifier; threshold-voltage deviation; time-dependent load; tunable CMOS-DRAM voltage limiter; tunable voltage-up converter; unity-gain frequency;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 1990. Digest of Technical Papers., 1990 Symposium on

Conference_Location

Honolulu, Hawaii, USA

Type

conf

DOI

10.1109/VLSIC.1990.111102

Filename

5727535