Digital part in 915MHz UHF RFID tag

Author

Feng, Yujing ; Zhang, Wei ; Xing, Xiaohui

Author_Institution

Sch. of Electron. Inf. Eng., Tianjin Univ., Tianjin, China

fYear

2009

fDate

27-29 Oct. 2009

Firstpage

115

Lastpage

119

Abstract

This paper presents a base-band processing module including a memory block for 915 MHz UHF RFID tags which accords with ISO/IEC 18000-6 type B protocol and supports basic mandatory instructions. It has a novel clock generation block to ensure correct working under tough clock conditions. Behavioral model of the module was created with Verilog HDL. The design was simulated and verified with ModelSim SE 6.0 and Altera FPGA platform, respectively. The tag chip was fabricated successfully based on Chartered 0.35 Â¿m 3.3 V CMOS technology, and the power dissipation of its digital part was about 41.2 Â¿W.

Keywords

CMOS integrated circuits; ISO standards; UHF integrated circuits; clocks; field programmable gate arrays; hardware description languages; protocols; radiofrequency identification; Altera FPGA platform; CMOS technology; ISO/IEC 18000-6 type B protocol; ModelSim SE 6.0; UHF RFID tag; Verilog HDL; base-band processing module; behavioral model; clock generation block; frequency 915 MHz; memory block; power 41.2 muW; power dissipation; size 0.35 mum; tag chip; voltage 3.3 V; CMOS technology; Clocks; Field programmable gate arrays; Hardware design languages; IEC standards; ISO standards; Power dissipation; Protocols; RFID tags; Semiconductor device modeling; Base-band processing; ISO/IEC 18000-6 protocol; RFID tag;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave, Antenna, Propagation and EMC Technologies for Wireless Communications, 2009 3rd IEEE International Symposium on

Conference_Location

Beijing

Print_ISBN

978-1-4244-4076-4

Type

conf

DOI

10.1109/MAPE.2009.5355791

Filename

5355791