Low hardware complexity key equation solver chip for Reed-Solomon decoders

This paper proposes a new simplified degree computationless modified Euclid´s algorithm (S-DCME) and its architecture for Reed-Solomon decoders. The proposed S-DCME algorithm reformulates the existing modified Euclid´s (ME) algorithm and uses new initial conditions to remove unnecessary hardware components and to use simple data paths. Thus, it requires two less multipliers and t + 2 less multiplexers compared with the reformulated inversionless Berlekamp-Massey (RiBM) algorithm which has shown the best performance so far. The critical path delay of S-DCME is 7.92 ns, i.e., T_Mul + T_ADD + T_MUX, that is equal to that of RiBM. The gate count of the implemented chip using the MagnaChip HSI 0.25 mum standard cell library is 17,800.