DocumentCode :
2707123
Title :
A 4-Mbit NAND-EEPROM with tight programmed Vt distribution
Author :
Tanaka, Tomoharu ; Momodomi, Masaki ; Iwata, Yoshihisa ; Tanaka, Yoshiyuki ; Oodaira, Hideko ; Itoh, Yasuo ; Shirota, Riichiro ; Ohuchi, Kazunori ; Masuoka, Fujio
fYear :
1990
fDate :
7-9 June 1990
Firstpage :
105
Lastpage :
106
Abstract :
The authors describe a 4-Mb NAND-EEPROM with tight Vt (threshold voltage) distribution which is controlled by a novel program verify technique. A tight Vt distribution width of 0.6 V for the entire 4-Mb cell array is achieved, and read margin is improved. A unique twin p-well structure has made it possible to realize low-power 5-V-only erase/program operation easily compared with the previous design
Keywords :
EPROM; NAND circuits; integrated memory circuits; 4 Mbit; 5 V; 5-V-only erase/program operation; NAND-EEPROM; low power operation; twin p-well structure;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 1990. Digest of Technical Papers., 1990 Symposium on
Conference_Location :
Honolulu, Hawaii, USA
Type :
conf
DOI :
10.1109/VLSIC.1990.111117
Filename :
5727550
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2707123
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