A capacitor-free fast-transient-response LDO with dual-loop controlled paths

Author

Chen, Jiann-Jong ; Yang, Fong-Cheng ; Kung, Che-Min ; Lai, Bao-Peng ; Hwang, Yuh-Shyan

Author_Institution

Nat. Taipei Univ. Technol., Taipei

fYear

2007

fDate

12-14 Nov. 2007

Firstpage

364

Lastpage

367

Abstract

A capacitor-free fast-transient-response low-dropout voltage regulator (LDO) with dual-loop controlled paths is presented in this paper. This technique can make the transient response to be faster than other LDOs with traditional controlled loop. Especially, the performance of settling time of proposed LDO is excellent without off-chip capacitors. With 1.5 V power supply voltage, the output voltage is designed as 1.2V. The prototype of the LDO is fabricated with TSMC 0.35-mum DPQM CMOS processes. The active area is only 360 mum times 345 mum.

Keywords

CMOS integrated circuits; transient response; voltage regulators; DPQM CMOS; capacitor-free fast-transient-response; dual-loop controlled paths; low-dropout voltage regulator; off-chip capacitors; size 0.35 mum; size 345 mum; size 360 mum; transient response; voltage 1.2 V; voltage 1.5 V; Analog circuits; Capacitors; Low voltage; Operational amplifiers; Power amplifiers; Power supplies; Power transistors; Regulators; Transient response; Voltage control; low dropout voltage regulator; transient response; voltage regulator;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2007. ASSCC '07. IEEE Asian

Conference_Location

Jeju

Print_ISBN

978-1-4244-1359-1

Electronic_ISBN

978-1-4244-1360-7

Type

conf

DOI

10.1109/ASSCC.2007.4425706

Filename

4425706