DocumentCode
2707725
Title
Can EDA help solve analog test and DFT challenges?
fYear
2009
fDate
1-6 Nov. 2009
Firstpage
1
Lastpage
1
Abstract
The constant demand for analog functions in ICs and SOCs, contrasted with the improving efficiency of testing digital functions implemented with automated design-for-test (DFT) methods, is increasing the demand for analog DFT to facilitate faster, lower cost, analog testing. Most analog DFT solutions are ad-hoc and specific to each company or product, and there is very little, if any, commercially available analog DFT automation. This panel explored whether and where the EDA industry could improve DFT and testing of analog functions.
Keywords
analogue integrated circuits; design for testability; electronic design automation; integrated circuit testing; system-on-chip; EDA; IC; SOC; analog design-for-test; analog functions; automated design-for-test methods; digital function testing; Circuit noise; Computer errors; Debugging; Electronic design automation and methodology; Error analysis; Integrated circuit interconnections; Logic; Signal design; Signal processing; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2009. ITC 2009. International
Conference_Location
Austin, TX
Print_ISBN
978-1-4244-4868-5
Electronic_ISBN
978-1-4244-4867-8
Type
conf
DOI
10.1109/TEST.2009.5355833
Filename
5355833
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