Title :
ESD immunity in system designs, system field experiences and effects of PWB layout
Author :
Smith, Douglas C. ; Nakauchi, Ed
Author_Institution :
D.C. Smith Consultants, Los Gatos, CA, USA
Abstract :
Soft errors as well as damage can be caused by ESD in electronic systems. Such effects have resulted in many problems with companies and customers incurring large costs. Effects on system immunity of printed wiring board layout are covered and examples of field problems described. Suggestions on how to avoid such problems are given.
Keywords :
design engineering; electrostatic discharge; printed circuit layout; printed circuit testing; ESD; ESD damage; ESD immunity; ESD-induced soft errors; PWB layout effects; damage costs; electronic systems; error costs; field problems; printed wiring board layout; system design; system field experience; system immunity; Connectors; Copper; Costs; Electronic mail; Electrostatic discharge; Ferrites; Impedance; Printed circuits; Resistors; Testing;
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
1-58537-018-5
DOI :
10.1109/EOSESD.2000.890026
