Neural network implementation using uniformly weighted bit-streams

A method for the parallel implementation of artificial neural networks (ANN), using digital logic, is presented. Uniformly weighted bit-streams are used to represent bipolar analogue signals. Operations necessary for neural network behaviour like summing, scaling and squashing have been implemented and presented. Two novel architectures which exhibit smooth, differentiable transfer functions have also been presented. The bit-stream technique is inherently parallel in nature and hence performance is not affected by the size of the network. It is well suited for field programmable gate arrays (FPGA) but could easily be implemented on digital application specific integrated circuits (ASIC). The usefulness of the technique has been demonstrated by implementing pattern classifiers on two standard benchmark problems.