Title :
A 512 mb 2-channel mobile DRAM (oneDRAM™) with shared memory array
Author :
Nam, Kyungwoo ; Kim, Jung-Sik ; Oh, Chi Sung ; Sohn, Hangu ; Lee, Dong Hyuk ; Lee, Changho ; Kim, Sooyoung ; Park, Jong-Wook ; Kim, Yongjun ; Kim, Mijo ; Kim, Jinkuk ; Lee, Hocheol ; Kwon, Jinhyoung ; Seo, Dong Il ; Jun, Young-Hyun ; Kim, Kinam
Author_Institution :
Memory Div., Samsung Electron. Co., Hvvasung, South Korea
Abstract :
A 1.8 V, 512 Mb two-channel synchronous mobile DDR SDRAM (OneDRAMtrade) with 333 Mbps/pin was designed, with 90 nm technology. The device can operate as 2 separate mobile DDR SDRAMs through each channel because of its exclusive accessibility from each channel to dedicated memory arrays. A new control scheme is proposed to exchange data between two channels by sharing one common memory array. The shared memory array control scheme is based on direct addressing mode to achieve compatibility with normal SDRAM interface together with fast data transfer speed between two channels.
Keywords :
DRAM chips; SRAM chips; nanotechnology; OneDRAMtrade; data transfer speed; direct addressing mode; nanotechnology; shared memory array; size 90 nm; storage capacity 512 Mbit; synchronous mobile DDR SDRAM; two-channel DDR SDRAM; voltage 1.8 V; Control systems; DRAM chips; Modems; Multimedia systems; Pins; Process control; Random access memory; SDRAM; Solid state circuit design; Solid state circuits;
Conference_Titel :
Solid-State Circuits Conference, 2007. ASSCC '07. IEEE Asian
Conference_Location :
Jeju
Print_ISBN :
978-1-4244-1359-1
Electronic_ISBN :
978-1-4244-1360-7
DOI :
10.1109/ASSCC.2007.4425766
