Title :
Tabu search application in solving an SP-based BBL placement problem of VLSI circuit physical design
Author :
Liu, Yiling ; Yu, Juebang ; Yang, Bo ; Xu, Ning
Author_Institution :
Sch. of Electron. Eng., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Abstract :
An effective BBL placement algorithm, named as SPTS algorithm, is developed based on the sequence pair (SP) graph representation and the tabu search (TS) optimization strategy. The optimum SP, formulated by the so-called Murata-Kajitani construction rule, is used in the initial placement, then by carefully choosing the TS parameters the near-optimum placement result will be obtained by iterative computations. Some comparative simulation experiments are conducted with respect to SA and GA algorithms. The results justify the effectiveness of our SPTS algorithm.
Keywords :
VLSI; graph theory; iterative methods; network synthesis; optimisation; search problems; GA algorithms; Murata-Kajitani construction rule; SA algorithm; VLSI circuit physical design; building block layout placement problem; iterative computations; near-optimum placement; sequence pair graph; tabu search application; Algorithm design and analysis; Application software; Artificial neural networks; Circuit simulation; Computational modeling; Computer integrated manufacturing; Computer science; Design engineering; Iterative algorithms; Very large scale integration;
Conference_Titel :
Neural Networks and Signal Processing, 2003. Proceedings of the 2003 International Conference on
Conference_Location :
Nanjing
Print_ISBN :
0-7803-7702-8
DOI :
10.1109/ICNNSP.2003.1279301
