DocumentCode
2709450
Title
A CMOS LC VCO in 0.5μm process
Author
Xu, Yin ; Li, Zheying
Author_Institution
EAIE, Beijing Jiaotong Univ., Beijing
fYear
2008
fDate
21-24 April 2008
Firstpage
1
Lastpage
4
Abstract
A CMOS LC VCO in CSMC0.5mum is designed in this paper. To design the VCO some methods of optimization are proposed to reduce phase noise and ASITIC is used to optimize an on-chip integrated inductor. A NMOS varactor is applied here, which makes the circuit has a wide tuning range. In the paper, the supply voltage is 3.3 volts, oscillation frequency is 2.33 GHz.
Keywords
CMOS integrated circuits; inductors; varactors; voltage-controlled oscillators; CMOS LC VCO; NMOS varactor; frequency 2.33 GHz; on-chip integrated inductor; oscillation frequency; supply voltage; tuning; voltage 3.3 V; CMOS process; Circuit optimization; Design optimization; Frequency; Inductors; MOS devices; Phase noise; Varactors; Voltage; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Technology, 2008. ICIT 2008. IEEE International Conference on
Conference_Location
Chengdu
Print_ISBN
978-1-4244-1705-6
Electronic_ISBN
978-1-4244-1706-3
Type
conf
DOI
10.1109/ICIT.2008.4608654
Filename
4608654
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