Accelerating the transient load response of an FPGA-counter-based SR forward converter

Accelerating the transient load response is proposed herein and applied to a field programmable gate arrays (FPGA)-counter-based forward converter with synchronous rectification (SR). With only one comparator and without any analog-to-digital converter (ADC), the information on the feedback output voltage is entirely obtained according to a counter. Besides, the transient load response is improved significantly by using the proposed control strategy, especially from heavy load to light load. In this paper, the operation of such a control topology is illustrated, along with some experimental results to verify its effectiveness