DocumentCode :
2710948
Title :
An XML-based meta-model for the design of multiprocessor embedded systems
Author :
Cesário, W.O. ; Gauthier, L. ; Lyonnard, D. ; Nicolescu, G. ; Jerraya, A.A.
Author_Institution :
TIMA Lab., Grenoble, France
fYear :
2000
fDate :
2000
Firstpage :
75
Lastpage :
82
Abstract :
The design of multiprocessor embedded systems requires new design paradigms. Most new paradigms are conceived around the idea of deploying pre-characterized software and hardware components. Making all these building blocks communicate in an efficient and error-proof manner is the most important challenge facing new design methodologies. Expectably, convenient modeling of these components and their communication at different abstraction levels is the central problem of any new system-level synthesis environment. We present Colif, a meta-model that was developed to be an object-oriented intermediate design model for system-level synthesis of multiprocessor embedded systems. Its design representation clearly distinguishes communication infrastructure and behavior, allowing independent refinement of these features. Colif objects are polymorphic, in the sense that they represent design information at different abstraction levels. At the highest abstraction level, it does not impose any specific computation model or communication semantics, it could be seen as a “meta-model”. It will only have full execution semantics, so we could call it an “actual” design model, when working at lower abstraction levels
Keywords :
embedded systems; hypermedia markup languages; multiprocessing systems; object-oriented methods; object-oriented programming; Colif; XML-based meta-model; abstraction levels; communication infrastructure; full execution semantics; multiprocessor embedded system design; object-oriented intermediate design model; polymorphic objects; system-level synthesis; system-level synthesis environment; Communication networks; Computational modeling; Design methodology; Embedded software; Embedded system; Hardware; Laboratories; Multiprocessing systems; Power system modeling; Productivity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VHDL International Users Forum Fall Workshop, 2000. Proceedings
Conference_Location :
Orlando, FL
Print_ISBN :
0-7695-0890-1
Type :
conf
DOI :
10.1109/VIUF.2000.890272
Filename :
890272
Link To Document :
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