DocumentCode :
2710979
Title :
Mixed language design data access: procedural interface design considerations
Author :
Martinolle, Françoise ; Parvathy, Uma
Author_Institution :
Cadence Design Syst. Inc., San Jose, CA, USA
fYear :
2000
fDate :
2000
Firstpage :
95
Lastpage :
99
Abstract :
A procedural language interface allows access of static and runtime data. With mixed language design becoming more prevalent, comes the necessity to develop bilingual procedural language interfaces. What is the best approach? Extend an existing HDL interface to deal with the other language, provide a language-independent interface, or create a dual interface? This paper discusses the different approaches and describes the solution chosen to develop a Verilog/VHDL language interface
Keywords :
hardware description languages; logic CAD; simulation languages; HDL; VHDL; Verilog; bilingual procedural language interfaces; dual interface; language-independent interface; mixed language design data access; runtime data; simulation languages; static data; Analytical models; Application specific integrated circuits; Design methodology; Hardware design languages; Libraries; Programmable logic arrays; Runtime; Signal processing; Signal resolution; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VHDL International Users Forum Fall Workshop, 2000. Proceedings
Conference_Location :
Orlando, FL
Print_ISBN :
0-7695-0890-1
Type :
conf
DOI :
10.1109/VIUF.2000.890276
Filename :
890276
Link To Document :
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